The value of aluExtPortEtherAdminPhyTxClock indicates the mode used to establish timing control of a 1000BASE-T port. The aluExtPortEtherAdminPhyTxClock is used to control the setting of register 9, bits 10-12 that are described in Table 40-3 of IEEE 802.3-2008. Register 9.12, the MASTER-SLAVE Manual Config Enable bit, is cleared when 'auto-pref-slave (3)' or 'auto-pref-master (4)' is configured. Otherwise the register 9.12 bit is set. Register 9.10 will be cleared when 'auto-pref-slave (3)' is configured and 'auto-pref-master (4)' will cause register 9.10 to be cleared. When aluExtPortEtherAdminPhyTxClock is 'slave (1)', register 9.11, the MASTER-SLAVE Manual Config Value bit, is cleared. When aluExtPortEtherAdminPhyTxClock is 'master (2)' MASTER-SLAVE Manual Config Value bit is set. For ports that cannot support 1000BASE-T, aluExtPortEtherAdminPhyTxClock will be defaulted to 'notApplicable (0)' and cannot be changed. For ports that support 1000BASE-T, setting aluExtPortEtherAdminPhyTxClock to 'notApplicable (0)' will result in aluExtPortEtherAdminPhyTxClock being set to the DEFVAL value of 'auto-pref-slave (3)'. Setting aluExtPortEtherAdminPhyTxClock on 1000BaseT microwave aware ports (ie. ports associated with ALU-MICROWAVE-PORT::aluMwRadioPortID) is allowed but it does not establish timing control of the 1000BASE-T port. The operational aspects of microwave ports with respect to timing control is described under aluExtPortEtherOperPhyTxClock