MIB Viewer

cmgDsuInvertTxC

OBJECT-TYPE
1.3.6.1.4.1.6889.2.9.1.1.11.2.1.1.8
Access
read-write
Status
obsolete
Sub-identifiers
0
Specifies whether the clock supplied by the DSU/CSU on the TXC interchange circuit DB (CCITT 114) is phase inverted with respect to the Transmitted Data interchange ciucuit BA (CCITT 103). This option is useful when long cable lengths between the DSU/CSU and the DTE are causing data errors.
INTEGER { enabled(1), disabled(2) }