Cache Module Board Read Errors. This shows the total number of read memory parity errors that were detected while reading from the Cache Module board. The mirrored copy of data on the board can be accessed to obtain correct data if a memory parity errors occurs. Memory parity errors occur when the system detects that information has not been transferred correctly. A parity bit is included for each byte of information stored in memory. When the microprocessor reads or writes data, the system counts the value of the bits in each byte. If a total does not match the system`s expectations, a parity error has occurred. A bad memory chip, memory corruption, or lack of refresh may cause memory parity errors.