MIB Viewer

hpevtBootProblemBranchingToPgzLocation

TRAP-TYPE
1.3.6.1.4.1.11.2.23.35.9052
Sub-identifiers
0
At a certain point in PDC boot, all of the processors in the partition except the PD monarch are put into a sleep, and they remain there until they are awakened by the PD monarch, at which time they read an architected location in Page Zero to find out where to branch to. This gives the OS a mechanism by which to bring processors under its control and have it executing OS code. This chassis log is sent if and when a problem is detected by PDC regarding the contents in the Page Zero location. This means that PDC cannot branch to the location logged in the Page Zero location. So, PDC sends this chassis log and then the processor returns to sleep. The data field is unused.