Binary coded modes: Selecting short pulse detection enable by setting the corresponding bit to 1 enables interrupt support for counting. Only positive edges are accepted as trigger source. The maximum counting frequenz equals 2000 Hz. This mode is available for inputs 0-3 only. Selecting counter clear on read by setting the corresponding bit to 1 enables the corresponding counter to be cleared automatically every time it is read, except HTTP reading with user rights. The OCTETS are interpreted bit-by-bit, Bit 0 corresponds to the LSB. Selection for input 0-1: OCTET 1: unused OCTET 2: unused OCTET 3: unused OCTET 4, Bit 4-7: unused Bit 3 : Bidirectional counter enable Bit 2 : Counter clear on read Bit 1 : Change detection enable (default) Bit 0 : Short Pulse detection enable